Design-for-Test (DFT) Engineer
Location:
Chennai / USA
Experience Required:
3+ Years
Job Description:
Seeking an experienced DFT Engineer to implement and validate DFT solutions for ASIC/SoC designs, ensuring high fault coverage, testability, and silicon quality.
Key Responsibilities:
● Implement scan insertion, scan-chain stitching, and scan configuration.
● Generate, validate, and debug ATPG patterns for stuck-at, transition-delay, and IDDQ faults.
● Perform DFT design-rule checks (DRC), analyze fault coverage, and resolve testability issues.
● Implement and verify MBIST/LBIST solutions.
● Support JTAG, boundary scan, IJTAG, and OCC integration, as required.
● Perform pattern simulation, debug failures, and validate design-to-pattern consistency.
● Collaborate with RTL Design, Design Verification, and Physical Design teams.
● Support manufacturing test development, design integration, and silicon bring-up debugging.
● Develop and maintain DFT scripts, configuration files, and documentation.
Required Qualifications:
● Strong knowledge of digital logic, RTL, and VLSI fundamentals.
● Understanding of scan-based DFT, scan chains, ATPG, fault models, and fault coverage.
● Proficiency in Verilog/SystemVerilog and TCL scripting.
● Knowledge of DFT DRC, pattern validation, scan enable, clock/reset handling, and test-mode configuration.
● Strong analytical, debugging, and collaboration skills.
Preferred Skills:
● Experience with Siemens Tessent, Synopsys TestMAX, or Cadence Modus.
● Knowledge of MBIST/LBIST, JTAG, boundary scan, and IJTAG.
● Experience with scan compression, test-point insertion, advanced ATPG, and OCC integration.
● Familiarity with gate-level simulation, timing-aware validation, and post-silicon debugging.
Qualifications:
● B.E./B.Tech/M.E./M.Tech in ECE, EEE, Electrical Engineering, or a related discipline.
● 3+ years of relevant DFT implementation and verification experience.
● Practical experience in scan insertion, ATPG, and DFT validation preferred.
Why Join Edveon Technologies?
● Work on advanced VLSI test solutions and contribute to improving ASIC/SoC quality.
Our locations
INDIA
Edveon Technologies Pvt Ltd
1/3A 3B, Siruseri Natham Link Road,
Siruseri, Chennai, Tamil Nadu, 600130
USA
Edveon Inc
440 N Wolfe Rd, Cube E040
Sunnyvale, CA 94085